1. Field of the Invention
The present invention relates to semiconductor devices and, more particularly, but not by way of limitation, to an impedance calibration circuit having an adjustable reference voltage generation unit.
2. Description of Related Art
In recent years, operating frequencies of semiconductor devices are showing a tendency to increase. Also, alternating-current (AC) characteristics associated with input and output signals, such as a data signal, are very important to high-frequency semiconductor devices. The AC characteristics are affected by the characteristics of a channel that connects two or more devices rather than a semiconductor device or a controller for controlling the semiconductor device. Thus, it is essential that semiconductor devices should be designed to improve channel characteristics.
In order to improve the channel characteristics, impedance matching is typically performed in a channel using an on-die-termination (ODT) circuit and an off-chip-driver (OCD) circuit. Specifically, in order to improve the channel characteristics, in a semiconductor device, an output signal is output through a data input/output terminal after passing through an OCD circuit having an output impedance that is adjusted to a predetermined impedance, while an input signal is input through the data input/output terminal after passing through an ODT circuit having an input impedance that is adjusted to a predetermined impedance.
The semiconductor device includes an impedance calibration circuit, which calibrates the impedance of an ODT circuit or an OCD circuit using an external reference resistor, in order to further improve the channel characteristics. The reference resistor used for impedance calibration may have various resistances according to systems or other circumstances in which the semiconductor device is used. An impedance calibration circuit for the ODT circuit or the OCD circuit may calibrate impedance therein in proportion to a reference resistance. Each of the ODT circuit and the OCD circuit receives information on the calibrated impedance from the impedance calibration circuit and adjusts impedance therein. Also, the operation of the impedance calibration circuit and the operation of the ODT circuit or the OCD circuit are necessarily tested in testing the semiconductor device.
FIG. 1 is a block diagram of a conventional impedance calibration circuit.
Referring to FIG. 1, the conventional impedance calibration circuit includes an impedance calibration unit 10, a comparison unit 20, a reference voltage generation unit 30, and an impedance matching unit 40. The impedance calibration unit 10 includes a variable impedance circuit 11 and a control code generator 13. The reference voltage generation unit 30 includes resistors R10 and R20 that are connected in series between a power supply voltage Vdd and a ground voltage. The impedance matching unit 40 includes two variable impedance circuits 41 and 43. In FIG. 1, reference character ZQ refers to an additional terminal used for impedance calibration, RQ refers to a reference resistor, and DQ1 refers to a data input/output terminal.
Functions of the respective blocks shown in FIG. 1 will now be described.
The impedance calibration unit 10 calibrates the calibration impedance therein (i.e., the impedance of the variable impedance circuit 11) in response to a control signal “con” output from the comparison unit 20 and outputs an impedance control code “code”. The variable impedance circuit 11, which is connected between the power supply voltage Vdd and the terminal ZQ, may include a MOS array and has an impedance value corresponding to the impedance control code “code”. The control code generator 13 varies the impedance control code “code” in response to the control signal “con” and outputs the varied code to the variable impedance circuit 11. After the impedance calibration operation is finished, the control code generator 13 outputs the impedance control code “code” to the impedance matching unit 40. The comparison unit 20 compares a voltage VZQ at the terminal ZQ with a reference voltage Vref and outputs the control signal “con” based on the comparison result. The reference voltage generation unit 30 outputs a predetermined reference voltage Vref. The impedance matching unit 40, which may be an ODT circuit or an OCD circuit, adjusts input/output impedance (i.e., the impedance of the variable impedance circuits 41 and 43) in response to the impedance control code “code”. That is, when the impedance matching unit 40 is an ODT circuit, the ODT circuit terminates a signal input to the data input/output terminal DQ1 as the input/output impedance. Also, when the impedance matching unit 40 is an OCD circuit, the output impedance of the OCD circuit is adjusted as the input/output impedance. The variable impedance circuits 41 and 43 of the impedance matching unit 40 function as a pull-up portion and a pull-down portion, respectively. Also, each of the variable impedance circuits 41 and 43 of the impedance matching unit 40 has the same configuration as the variable impedance circuit 11 of the impedance calibration unit 10 and has an impedance value corresponding to the impedance control code “code”.
The operation of the conventional impedance calibration circuit shown in FIG. 1 will now be described.
In general, the resistors R10 and R20 of the reference voltage generation unit 30 have the same resistance. Thus, the reference voltage generation unit 30 outputs a reference voltage Vref having a half level of the power supply voltage Vdd. The comparison unit 20 compares the voltage VZQ at the terminal ZQ with the reference voltage Vref and outputs a control signal “con”. When calibration impedance (i.e., the impedance of the variable impedance circuit 11 of the impedance calibration unit 10) is higher than the impedance of the reference resistor RQ, the voltage VZQ at the terminal ZQ becomes lower than the reference voltage Vref, so that the comparison unit 20 outputs a low-level control signal “con”.
When the calibration impedance is lower than the impedance of the reference resistor RQ, the voltage VZQ at the terminal ZQ becomes higher than the reference voltage Vref, so that the comparison unit 20 outputs a high-level control signal “con”. The control code generator 13 of the impedance calibration unit 10 varies the impedance control code “code” in response to the control signal “con” and outputs the varied code to the variable impedance circuit 11. That is, the control code generator 13 of the impedance calibration unit 10 decreases the impedance control code “code” in response to the low-level control signal “con”, while the control code generator 13 of the impedance calibration unit 10 increases the impedance control code “code” in response to the high-level control signal “con”.
As described above, the variable impedance circuit 11 has an impedance value corresponding to the impedance control code “code”. Accordingly, when the low-level control signal “con” is input, the impedance control code “code” decreases, and thus the calibration impedance (i.e., the impedance of the variable impedance circuit 11) becomes low. Also, when the high-level control signal “con” is input, the impedance control code “code” increases, and thus the calibration impedance becomes high.
When the above-described operation is performed until the voltage VZQ at the terminal ZQ is equal to the reference voltage Vref, the calibration impedance becomes the same as the impedance of the reference resistor RQ. The control code generator 13 outputs the impedance control code “code” allowing the calibration impedance to be the same as the impedance of the reference resistor RQ to the impedance matching unit 40. For example, the control code generator 13 may initially output an impedance control code “code” with a small value, continuously vary impedance control codes “code”, and output an impedance control code “code” with the greatest value among the continuously varied impedance control codes “code” to the impedance matching unit 40.
Each of the variable impedance circuits 41 and 43 of the impedance matching unit 40 has the same configuration as the variable impedance circuit 11 of the impedance calibration unit 10. Thus, when the same code as the impedance control code “code” input to the variable impedance circuit 11 is input to the variable impedance circuits 41 and 43, input/output impedance (i.e., the impedance of the variable impedance circuits 41 and 43) becomes the same as the calibration impedance (i.e., the impedance of the variable impedance circuit 11). The number of variable impedance circuits of the impedance matching unit 40 depends on the number of data input/output terminals DQ1.
However, in the conventional impedance calibration circuit shown in FIG. 1, there is no problem with the operation of the impedance calibration circuit, but there are some problems in testing a semiconductor device including the impedance calibration circuit.
Specifically, when testing a semiconductor device including the conventional impedance calibration circuit for reference resistors having different reference resistances, a plurality of reference resistors having different resistances should be installed at test equipment and a relay switch should be installed between the semiconductor device and each of the reference resistors. As a result, a large amount of testing space is required, and the number of semiconductor devices that can be tested at one time is reduced. In turn, it is difficult to mass-produce semiconductor devices at high efficiency. Consequently, even though semiconductor memory devices may use a reference resistance ranging from 120Ω to 360Ω, semiconductor memory devices are typically tested using a single reference resistance of 240Ω.